8086 microprocessor architecture ppt

If this flag is set, the maskable interrupts are recognized by the CPU, otherwise they are ignored. The word of data is at an odd-address boundary is called misaligned word, as shown in Figure below. The microprocessor has a total of fourteen registers that are accessible to the programmer. The physical address is 20 bits long and corresponds to the actual binary code output by the BIU on the address bus lines.

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Data at any location has a logical address specified as: When in the single-step mode, it executes an instruction and then jumps to a special service routine that may determine the effect of executing the instruction.

Registers & Memory Organization

Data bytes associated with an even address, etc. The four different cases that happen during accessing data: The complete bit configuration of is shown in the figure. Aligned and misaligned double word a Memory segmentation The size of address bus of is 20 and is able to address 1 Mbytes of physical memory, but all this memory is not active at one time.

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This type of operation is very useful for debugging programs. This is set when there is a carry from the lowest nibble i. OF Over flow Flag: How can a bit address opt obtained, if there are only bit registers?

The registers of are categorized into 5 different groups. Memory Organization As far as we know is bit processor that can supports 1Mbyte i. Actually, this 1Mbytes of memory are partitioned into 16 parts named as segments. The offset address is also bit wide and it is provided by one of the associated pointer or index register.

The above figure illustrates the software architecture of the microprocessor. This corresponds to the 64K-bytelength of the segment. What is important to the programmer is being aware of the various registers within the device and to understand their purpose, functions, operating capabilities, and limitations.

Register groups of micro-processor d General Registers All general registers of the microprocessor can be used for arithmetic and logic operations. These all general registers can be used as either 8-bit or bit registers.

Six of these are status flags. Software model of microprocessor To be able to program a microprocessor, one does not need to know all of its hardware architectural features. This "real" address is called the physical address.

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The lower-addressed byte is the least significant byte of the word, and the higher- addressed byte is its most significant byte. The physical address is 20 bits long and corresponds to the actual binary code output by the BIU on the address bus lines.

This flag is set, if an overflow occurs, i.

The 8068 register contents indicate the results of computation in the ALU. These calculations are done in hardware within the microprocessor. This is used by string manipulation instructions.

The double word at address of non-multiples of 4 is called misaligned double word shown in Figure below. ZF is set if the result produced by an instruction is zero.

A logical address gives the displacement from the base address of the segment to the desired location within it, as opposed to its "real" address, which maps directly anywhere microprocesspr the 1 MByte memory space.

The point to note is that the beginning segment address must begin at an address divisible by Offset Offset is the displacement of the memory location from the starting location of the segment.

Aligned and misaligned word To store double word four locations are needed. However, the largest register is only 16 bits 64k ; so physical addresses have to be calculated.

Flag register is bit register with only nine bits that are implemented.

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